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Summary

  1. check-typo (commit: 05d4d20) (details)
  2. Changes (commit: 4c74fea) (details)
  3. Review (commit: 8e558d9) (details)
  4. Review (commit: a2d1f59) (details)
  5. Add NOTES.md (commit: 6dd536d) (details)
  6. Remove vestiges of 32-bit support (commit: 30ab9bb) (details)
  7. Use allocatable register (ft0) as scratch register for single precision store (commit: 0bd2064) (details)
  8. Use '$' to escape asm symbols (commit: 8417d6f) (details)
  9. Remove vestiges of 32-bit support (commit: 35e85da) (details)
  10. riscv.S: use hex literal (commit: b63979a) (details)
  11. Group pattern matching cases together (commit: ce63bf4) (details)
  12. Use jr instead of jalr (commit: 72ce86b) (details)
  13. Changes (commit: ef7d00b) (details)
  14. check-typo (commit: 8ccd05d) (details)
  15. Allow t0 to be used for the register allocator (commit: ce361b9) (details)
  16. check-typo (commit: 54ddb27) (details)
The file was modifiedasmcomp/riscv/arch.ml (diff)
The file was modifiedasmcomp/riscv/proc.ml (diff)
The file was modifiedasmcomp/riscv/selection.ml (diff)
The file was modifiedruntime/riscv.S (diff)
The file was modifiedChanges (diff)
The file was modifiedruntime/riscv.S (diff)
The file was modifiedasmcomp/riscv/emit.mlp (diff)
The file was modifiedasmcomp/riscv/arch.ml (diff)
The file was addedasmcomp/riscv/NOTES.md
Commit 30ab9bb52a8ddba9f24156595d5a169a6ec7745c by n.oje.bar
Remove vestiges of 32-bit support
 (commit: 30ab9bb)
The file was modifiedasmcomp/riscv/emit.mlp (diff)
The file was modifiedasmcomp/riscv/arch.ml (diff)
Commit 0bd20640f85e9d440cc05817e75ed33b82f1a8f6 by n.oje.bar
Use allocatable register (ft0) as scratch register for single precision store
 (commit: 0bd2064)
The file was modifiedasmcomp/riscv/proc.ml (diff)
The file was modifiedasmcomp/riscv/emit.mlp (diff)
Commit 8417d6fcab067348f36c0f1af9a7e6635d2ee603 by n.oje.bar
Use '$' to escape asm symbols
 (commit: 8417d6f)
The file was modifiedasmcomp/riscv/emit.mlp (diff)
Commit 35e85da38377c0ff8472affca004f9d97f865c03 by n.oje.bar
Remove vestiges of 32-bit support
 (commit: 35e85da)
The file was modifiedasmcomp/riscv/proc.ml (diff)
The file was modifiedruntime/riscv.S (diff)
Commit ce63bf4f3402e90697484827221fcd63f853e68e by n.oje.bar
Group pattern matching cases together
 (commit: ce63bf4)
The file was modifiedasmcomp/riscv/selection.ml (diff)
The file was modifiedasmcomp/riscv/emit.mlp (diff)
The file was modifiedChanges (diff)
The file was modifiedtestsuite/tools/asmgen_riscv.S (diff)
Commit ce361b9781ba7b4d4134e788d601322961c55925 by n.oje.bar
Allow t0 to be used for the register allocator
 (commit: ce361b9)
The file was modifiedasmcomp/riscv/proc.ml (diff)
The file was modifiedasmcomp/riscv/emit.mlp (diff)
The file was modifiedruntime/riscv.S (diff)
The file was modifiedasmcomp/riscv/proc.ml (diff)